1. Field of the Invention
The present invention generally relates to a device, arrangement and method capable of effectively controlling bus request signal generation.
2. Description of Related Art
In recent years, a system on chip (hereinafter, referred to as “SOC”) has become more complex as integration density of the SOC has increased. SOC development efforts have also intensified in an effort to meet time-to-market needs of customers. Therefore, SOCs are being designed on the basis of a platform, in which the SOC may comprise a number of subsystems. In this case, these subsystems may share a system memory through a bus, i.e., the subsystems in the SOC are connected to the bus, and data is transmitted through the bus between the subsystems.
However, since the data is transmitted through the bus in this sub system organization, the data transmission may be substantially affected by the bandwidth of the bus. In the case of certain high-performance SOCs, substantial amounts of data traffic may limit possible improvements in the SOC performance due to what may be referred to as a ‘concentration-on-bus’ phenomenon. In other words, the subsystems access the memory of the SOC regardless of the bandwidth limitations of the bus, which may cause frequent intervals where bus traffic increases occur. As a result, entire SOC performance may be degraded.
A method for solving performance degradation due to this concentration-on-bus phenomenon may be to limit an access to the bus by the subsystems, so as to prevent the concentration-on-bus phenomenon. Limiting access may be done by calculating an entire bus bandwidth, and allotting proper (or desired) bus access timing inversely to each subsystem of the SOC. However, this method may be disadvantageous, in that it may not account for numerous possible variations in the average bus bandwidth, which could occur in a complex bus system that performs various functions. This may require that bus access timing be set (or re-calculated) in inordinate number of times, since the bus timing should be calculated with respect to each function. Thus, SOC performance may still suffer where an SOC is used in a complex bus system that performs various functions.